Connect models, software and hardware
Create a shared design space across target sparsity formats, operators, compilation and hardware execution. Model quality and system performance together define validation criteria.
Co-design sparse intelligence with target hardware
Starting from real models and workloads, co-design sparse structures, software execution and target hardware to turn original learning methods into measurable computing value. Adaptation and validation focus on model quality, throughput, latency, memory, energy and cost on each target platform.
Build a verifiable path through collaboration
Report simulation, compiler evaluation and device measurements separately, with clear environments and scope for each finding.