RESEARCH NEWS · NEURIPS 2026

AI learns its own structure

Two NeurIPS papers from the Cannistraci team explore hardware-efficient sparse training and dynamic structures for visual networks.

As AI models grow, a more fundamental question emerges: how should their parameters connect, and how can each computation create more value?

In September 2026, two dynamic sparsity papers from the Cannistraci team were accepted as posters at NeurIPS 2026. They explore hardware-friendly semi-structured sparse training and channel-wise dynamic sparsity with contextual modulation for convolutional networks.

Connections and learning

The brain supports perception, language, memory and reasoning through sparse, selective and evolving neural connections. Learning changes both connection strengths and the organization of the network.

Artificial neural networks commonly learn by adjusting connection weights. Cannistraci–Hebb Training (CHT) also brings structure into learning: during sparse training, connections can be adjusted, retained and grown. Weights describe connection strengths, while topology describes which units connect. Together they shape how information flows.

Network science and CHT

CHT draws on network science and the study of connectivity in complex networks. The Cannistraci team uses topological information in local network structure to guide the selection of potential connections and applies this idea to neural network training.

Research presented at ICLR 2024 introduced Epitopological Learning and CHT. Subsequent work extended the approach to Transformers and large language models. The two NeurIPS 2026 papers further explore hardware execution and different model architectures.

CHTs workflow showing removed links, inactive neurons and newly grown connections.
How connections change in one training step In the team’s 2025 CHTs study, each update removes selected links, clears inactive nodes and their paths, then grows connections using local topology. The top row follows the same network from left to right. Zhang et al., NeurIPS 2025, Fig. 1

Paper one: semi-structured dynamic sparse training

SCHTs: A Semi-Structured Dynamic Sparse Training Framework for Hardware-Efficient Deep Learning

Dynamic sparse training allows a model to adjust where connections occur as it learns. Efficient execution also depends on the sparsity patterns and operations supported by the hardware. SCHTs investigates semi-structured dynamic sparse training, allowing connections to change while following local structural constraints.

The approach examines the relationship between model quality, structural flexibility and execution efficiency. It opens a research direction for co-designing sparse models with GPUs, NPUs and specialized accelerators. Actual benefits depend on the model, hardware and workload being evaluated.

Paper two: channel-wise sparse training for convolutional networks

Cannistraci-Hebb Channel-wise Dynamic Sparse Training of Convolutional Neural Networks with Contextual Modulation

Convolutional neural networks use channels to extract features such as edges, textures, shapes and semantic information. They are used in industrial vision, robotics, medical imaging and edge devices. The second paper brings CHT to the channel level and introduces contextual modulation to investigate how these information channels can be organized.

Channel-wise dynamic sparsity provides a way to study how computation is allocated and how network structure changes during training. Because channels are closely related to convolution operations and hardware execution, the work also creates opportunities for further engineering exploration.

Models and hardware

Model capability, chip performance, memory, energy and inference cost are interconnected system concerns. Different hardware platforms support different operations, precision formats and execution patterns, so model structures must be evaluated for the task and platform in use.

Paired bars compare measured 2:4 speedups and projected 1:4 speedups for four sets of matrix shapes.
Measuring and estimating hardware speedup In the related CHTsNM preprint, blue bars show measured 2:4 sparse speedups for four sets of LLaMA matrix shapes. Green bars project a 1:4 hardware target using the compressed sparse row (CSR) benchmark for each set. Lyu, Wirz and Cannistraci, 2026 preprint, Fig. A4

The papers address how structure can align with hardware and how visual networks can organize information channels. They continue SparseMind’s research into efficiency across models and hardware through more effective connectivity.

Papers

SCHTs: A Semi-Structured Dynamic Sparse Training Framework for Hardware-Efficient Deep Learning

Cannistraci-Hebb Channel-wise Dynamic Sparse Training of Convolutional Neural Networks with Contextual Modulation

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